Superscalar microprocessor designs allow for the dispatching of multiple instructions in parallel to various execution units. However, many instructions are dependent upon receiving results from other instructions. Such dependent instructions may not reside adjacent each other within the instruction flow. Prior art designs that provide for the dispatching of adjacent pairs of instructions are inadequate to dispatch dependent instructions that are not adjacent to each other within the instruction flow. Therefore, there is a need in the art for a system and process for selecting instructions to be paired together, which is not limited to selecting adjacent instructions in a queue.